MADRID, 20 Ago. – –
The processor manufacturer Intel has presented the microarquitectura x86 with which the cores of your next Alder Lake CPUs for processors will work, with up to 40 percent more performance with the same power consumption.
This was announced by the American company this Thursday in the framework of Arquitecture Day 2021, which has described these innovations as “the biggest changes to Intel architectures in a generation.“
Intel’s new scalable x86 microarchitecture, coming with its upcoming Alder Lake family of products, targets a variety of functions, from low.power notebook applications to multi.core microservices.
Compared to Skylake, Intel’s Hybrid Microarchitecture Efficiency Core delivers 40 percent more performance with the same power, or the same performance while consuming less than 40% of the power.
In terms of performance, four efficiency cores offer 80 percent more performance and consume less power than two Skylake cores that run four threads, or the same performance and consume 80 percent less power.
This x86 core is the highest performance CPU core that Intel has ever built, and it was designed to increase execution parallelism, reduce latency, and increase general.purpose performance.
Also also to help support big data and code applications. The performance core provides an improvement in Geomean of about 19 percent across a wide range of workloads over the current 11th Gen Intel Core architecture (Cypress Cove core) at the same frequency.
Aimed at data center processors and machine learning, the Performance Core provides new Intel Advanced Matrix Extensions (AMX) to perform matrix multiplication operations for order of magnitude performance. : an increase of almost 8 times in the acceleration of artificial intelligence.
Another novelty announced at the Intel event was Thread Director. It is an approach to scheduling, developed to ensure that efficiency cores and performance cores work together, dynamically and intelligently allocating workloads and optimizing the system. Intelligence is built right into the core.
Intel has provided new details on Alder Lake, which will be Intel’s first performance hybrid architecture with the new Intel Thread Director. The Alder Lake.based products will begin shipping this year.
Among the rest of the announcements, Intel has unveiled Xe HPG, a new discrete graphics microarchitecture designed to scale to superior performance for gaming and authoring workloads.
The Xe HPG microarchitecture incorporates a new Xe core, a programmable and scalable element focused on computation, and with full DirectX 12 Ultimate support. New matrix engines within the Xe cores accelerate Artificial Intelligence workloads such as XeSS, a scaling technology that enables more performance and fidelity in games.
Xe HPG.based Alchemist processors (formerly codenamed DG2) will hit the market in Q1 2022 under the new Intel Arc Brand, announced Monday.
Data center solutions have also received announcements with Sapphire Rapids, which combines Intel’s performance cores with new accelerator engines. The technology uses a modular tiled SoC architecture that offers scalability through Intel’s EMIB packaging system and mesh architecture.
In addition, the company has announced Xe HPC, Ponte Vecchio, which it has defined as “the most complex SoC that Intel has ever built”, which is being used to develop a device of one hundred billion transistors.
Ponte Vecchio is already providing FP32 throughput of more than 45 TFLOPS, more than 5 TBps of memory fabric bandwidth, and more than 2 TBps of connectivity bandwidth.