Huawei presents a new Scaling Law with which it will obtain 1.4nm chips by 2031

Huawei Technologies has presented a new scaling law for the development of semiconductors with which it will match the creation of chips with the 1.4 nanometer process of its competitors by 2031.

The Chinese firm has presented ‘Tau Scaling Law’ this Monday, within the framework of the main global forum on electronic circuits and systems ‘IEEE International Symposium on Circuits and Systems (ISCAS)’, with which will guide the development of semiconductors going forward.

This law aims replace Moore’s Lawwhich for more than five decades has allowed the creation of increasingly smaller and more powerful chips while inserting a greater number of transistors into them, although it entails a significant cost.

The Law predicted that the number of transistors used on a chip would double approximately every two years; a geometric scale used by the main manufacturers in the industry and that is currently presents limitations with the miniaturization of transistors and the loss of economic profitability.

Huawei intends to replace it with a temporal scale, in which technologies such as la arquitectura LogicFoldingwhich increases transistor density by reducing the resistive and capacitive loading of signal propagation; and a multilevel co-optimization mechanism, covering semiconductor devices, circuits, chips and systems.

“This mechanism aims to systematically shorten the time constant to increase performance, energy efficiency and transistor density,” as explained in a press release.

With the Tau Scaling Law, Huawei ensures that it will be able to manufacture chips for high-end devices with a density of transistors equivalent to 1.4nm processes to 2031.